The present invention relates to a video capture system, and more particularly, to an address generating and mapping device of a video capture system wherein addresses are generated and the addresses between a microprocessor and a memory are mapped when capturing a video signal and storing it in the memory.
In a typical capture system, a picture of a video signal output on a screen by an NTSC (National Television System Committee) or PAL (Phase Alternation by Line) method is captured and stored in a memory, and then a CPU (or microprocessor) properly changes the data stored in the memory and outputs the changed data to a printer.
In order to capture an NTSC (or PAL) signal, a synchronizing signal is separated from a composite video signal, a chrominance signal is removed, the synchronizing signal is converted into a digital signal by an analog-to-digital (A/D) converter, and then the digital signal is stored in the memory.
A counter circuit for generating memory addresses where the digital data is to be stored is required to store the digital signal in the memory. The captured video data is converted by an appropriate algorithm and output in various forms. Also, an address mapping circuit for mapping addresses between the memory and the CPU is required to make the CPU recognize the generated memory addresses.